CMPET 117 - DIGITAL ELECTRONICS (3:3:0) - Fundamentals of digital circuits, including logic circuits, boolean algebra, Karnaugh maps, counters, and registers. Prereq. EET 101.
Instructor: K. Dudeck
Office: L-104: (Office hours are posted, additional hours by appointment.)
Grading:
Quizzes - 100 points (4 at 25pts each)
EXAM I - 100 points
EXAM II - 100 points
FINAL - 125 points
---------------------
TOTAL - 425 points
The minimum number of total points needed to earn letter grades are as follows:
A=382; B+=370; B=340; C+=327; C=297; D=255.
Academic Integrity : Students are expected to adhere to the University's Academic Integrity Policy.
Course Text: Floyd, Thomas L., Digital Fundamentals,
Ninth
Edition,
Prentice-Hall Inc., Upper Saddle River, NJ, 2006, 1997.
The tentative course outline is given below. Prior to each class period, the student is expected to read the sections listed from the text. After each class period, the student is expected to complete the homework problems listed. Homework is not turned in, however the student is STRONGLY encouraged to complete the homework prior to the problem sessions listed.
| # | Topic | Reading | Homework |
| 1 | Intro/Binary Numbers | 2-1,2 web link | 2-1 |
| 2 | Number Systems | 2-3 | 2-11 |
| 3 | Conversions | 2-8,9 | 2-(35->44)a->d |
| 4 | Arithmetic | 2-4,5 | 2-17,18 |
| 5 | Complements | 2-6 | 2-19,20,23,26 |
| 6 | QUIZ 1 / HOMEWORK | ||
| 7 | Signed Arithmetic | 2-7 | 2-29,32,33 |
| 8 | BCD | 2-10,11 | 2-(47,49,51)a->d |
| 9 | Logic Gates | 3-1,2,3,4,5 | 3-1,4,7,13,17 |
| 10 | Electrical Characteristics | 3-6,7,8 | 3-22,26,27,41 |
| 11 | Boolean Algebra | 4-1,2,3 | 4-5,6,(9)a->e |
| 12 | QUIZ 2 / HOMEWORK | ||
| 13 | Complements | 4-4,5 | 4-12,17,(19)a->c |
| 14 | Standard Forms | 4-6,7 | 4-21,29,33 |
| 15 | K-maps | 4-8 | 4-40,41,43 |
| 16 | K-maps | 4-42,44 | |
| 17 | REVIEW / HOMEWORK | ||
| 18 | EXAM I | ||
| 19 | Complements & K-maps | 4-9 | 4-47,48 |
| 20 | Combinational Circuits | 5-1 | 5-2,3 |
| 21 | Combinational Design | 5-2 | 5-11,12,44 |
| 22 | Universal Gates | 5-3,4 | 5-18,21 |
| 23 | <OPEN> | ||
| 24 | QUIZ 3 / HOMEWORK | ||
| 25 | Arithmetic Circuits | 6-1,2 | 6-1,4,5,6 |
| 26 | Comparitors | 6-4 | 6-11,12 |
| 27 | Decoders | 6-5,6 | 6-17,18,20 |
| 28 | Programmable Devices | 3-7 | 3-23,24 |
| 29 | Multiplexers | 6-7,8 | 6-26,28,44 |
| 30 | <OPEN> | ||
| 31 | QUIZ 4 / HOMEWORK | ||
| 32 | Latches | 7-1 | 7-1,4,7 |
| 33 | Flip Flops | 7-2 | 7-9,11,13,14 |
| 34 | Flip Flops | 7-4,5,6 | 7-25,28,31 |
| 35 | REVIEW / HOMEWORK | ||
| 36 | EXAM II | ||
| 37 | Counters | 8-1,2,3 | 8-2,3,11 |
| 38 | Synchronous Counters | 8-4,5 | 8-17,19,20 |
| 39 | Registers | 9-1,2,3,4,5,6 | 9-5,12,19 |
| 40 | Memory | 10-1,3 | 10-1,12,14, 33 |
| 41 | Memory | 10-2,4 | 10-6,16 |
| 42 | Intro. Microprocessors | 12-1,2 | |
| 43 | Intro. Microprocessors | 12-3 | |
| 44 | <OPEN> | ||
| 45 | REVIEW / HOMEWORK |
** FINAL ** To Be Scheduled During Finals Week